• JEDEC JESD22-B109B
Provide PDF Format

Learn More

JEDEC JESD22-B109B

  • FLIP CHIP TENSILE PULL
  • standard by JEDEC Solid State Technology Association, 07/01/2014
  • Publisher: JEDEC

$28.00$56.00


The Flip Chip Tensile Pull Test Method is performed to determine the fracture mode and strength of the solder bump interconnection between the flip chip die and the substrate. It should be used to assess the consistency of the chip join process. This test method is a destructive test.

Related Products

JEDEC JEP144A

JEDEC JEP144A

GUIDELINE FOR RESIDUAL GAS ANALYSIS (RGA) FOR MICROELECTRONIC PACKAGES..

$29.00 $57.00

JEDEC JESD82-7A

JEDEC JESD82-7A

DEFINITION OF THE SSTU32864 1.8-V CONFIGURABLE REGISTERED BUFFER FOR DDR2 RDIMM APPLICATIONS..

$30.00 $59.00

JEDEC JESD75-3

JEDEC JESD75-3

BALL GRID ARRAY PINOUTS STANDARDIZED FOR 8-BIT LOGIC FUNCTIONS..

$24.00 $47.00

JEDEC JESD46D

JEDEC JESD46D

CUSTOMER NOTIFICATION OF PRODUCT/PROCESS CHANGES BY SEMICONDUCTOR SUPPLIERS..

$27.00 $53.00