• JEDEC JEP163
Provide PDF Format

Learn More

JEDEC JEP163

  • SELECTION OF BURN-IN/LIFE TEST CONDITIONS AND CRITICAL PARAMETERS FOR QML MICROCIRCUITS
  • standard by JEDEC Solid State Technology Association, 09/01/2015
  • Publisher: JEDEC

$36.00$72.00


This publication is intended as a guideline to develop and establish conditions for burn-in and life test of MIL-PRF-38535 QML integrated circuits. These guidelines are intended to provide manufacturers with a consistent means of defining burn-in and life test stress and electrical test requirements acceptable to user organizations and for the development of Standard Military Drawings.

Related Products

JEDEC JESD78D

JEDEC JESD78D

IC LATCH-UP TEST..

$37.00 $74.00

JEDEC JESD 82-28A

JEDEC JESD 82-28A

FULLY BUFFERED DIMM DESIGN FOR TEST, DESIGN FOR VALIDATION (DFx)..

$82.00 $163.00

JEDEC EIA 323 (R2002)

JEDEC EIA 323 (R2002)

AIR-CONVECTION-COOLED, LIFE TEST ENVIRONMENT FOR LEAD-MOUNTED SEMICONDUCTOR DEVICES..

$26.00 $51.00

JEDEC JESD94B

JEDEC JESD94B

APPLICATION SPECIFIC QUALIFICATION USING KNOWLEDGE BASED TEST METHODOLOGY..

$40.00 $80.00